DocumentCode :
3221213
Title :
Ternary multiplier of multigate single electron transistor: Design using 3-T gate
Author :
Wu, Gang ; Cai, Li
Author_Institution :
Sci. Inst., Air Force Eng. Univ. of CPLA, Xi´´an, China
fYear :
2010
fDate :
9-11 June 2010
Firstpage :
1567
Lastpage :
1571
Abstract :
Due to the single electron transistor has the characteristics coulomb oscillation and adjustable threshold voltage, the single electron transistor is adapted to design the multiple value circuit. In this paper, a ternary multiplier is designed based on multigate single electron transistor, and the design uses the 3-T gate. The designed circuits have been simulated by SPICE. The results of simulation indicate the proposed ternary multiplier circuit has the excellence of simpler structure, smaller signal delay and lower power.
Keywords :
multiplying circuits; oscillations; single electron transistors; 3T gate; SPICE; coulomb oscillation; multigate single electron transistor; multiple value circuit; signal delay; ternary multiplier circuit; threshold voltage; Algebra; CMOS logic circuits; CMOS technology; Circuit simulation; Computational modeling; Integrated circuit technology; Logic circuits; Logic gates; Single electron transistors; Threshold voltage; 3-T gate; Multiple Value Logic; Single Electron Transistor; Ternary Multiplier;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control and Automation (ICCA), 2010 8th IEEE International Conference on
Conference_Location :
Xiamen
ISSN :
1948-3449
Print_ISBN :
978-1-4244-5195-1
Electronic_ISBN :
1948-3449
Type :
conf
DOI :
10.1109/ICCA.2010.5524397
Filename :
5524397
Link To Document :
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