DocumentCode :
3221538
Title :
Use of multi-port memories in programmable structures for architectural synthesis
Author :
Mandal, C. ; Zimmer, R.M.
Author_Institution :
Dept. of Comput. Sci., Brunel Univ., Uxbridge, UK
fYear :
1996
fDate :
9-11 Oct 1996
Firstpage :
341
Lastpage :
351
Abstract :
In this paper we make a study of the capabilities required of memories to support the synthesis of designs using structured architectures. We explore the advantages of using multi-port memories with two write ports as an architectural component over conventional memories with a single write port in such a synthesis environment. A study the of the memory resources available in some of the current Field Programmable Gate Arrays (FPGA) is made. We then propose a multi-port memory structure that could be suitable for use in programmable structures such as FPGAs, to facilitate implementations of designs through HLS. The principal advantages of the proposed memory structure are its flexibility, simplicity and its ability to support more efficient execution of operations than existing memory structures
Keywords :
field programmable gate arrays; high level synthesis; memory architecture; multiport networks; HLS; architectural synthesis; field programmable gate array; multiport memory; programmable structure; Algorithm design and analysis; Computer science; Control system synthesis; Data flow computing; Electronic design automation and methodology; Field programmable gate arrays; Hardware; High level synthesis; Semiconductor memory; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovative Systems in Silicon, 1996. Proceedings., Eighth Annual IEEE International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-2204
Print_ISBN :
0-7803-3639-9
Type :
conf
DOI :
10.1109/ICISS.1996.552441
Filename :
552441
Link To Document :
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