Title :
A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks
Author :
Kim, Duho ; Ko, Minsu ; Choi, K. Wang-Chun ; Choi, Woo-Young
Author_Institution :
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
Abstract :
A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm2. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.
Keywords :
CMOS integrated circuits; demodulators; personal area networks; quadrature phase shift keying; bit rate 4.8 Gbit/s; demodulator core; frequency 60 GHz; mixed-mode CMOS QPSK demodulator; power 54 mW; prototype chip; size 60 nm; voltage 1.2 V; wireless personal area networks; CMOS integrated circuits; Clocks; Frequency measurement; Logic gates; Optical signal processing; Phase shift keying; Semiconductor device measurement; 60-GHz; CMOS; QPSK; WPAN; demodulator; mixed-mode;
Conference_Titel :
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-7454-7
DOI :
10.1109/APCCAS.2010.5774815