Start-up analysis for differential ring oscillator with even number of stages

The start-up conditions for differential oscillator with an even number of stages are analyzed in this paper. Compared with those that have an odd number of stages, such oscillators may have two stable equilibrium states besides an astable equilibrium state in which the circuits can start to oscillate. To avoid the risk of possible latching up into the stable states, an additional start-up circuit technique is proposed. The proposed circuit should also reduce the start-up time. The theory is further confirmed with the design and fabrication of a 4-stage against 3-stage differential ring VCO´s in a PLL clock generator based on a 0.13μm CMOS process.