DocumentCode
3230367
Title
Architecture-level thermal behavioral characterization for multi-core microprocessors
Author
Li, Duo ; Tan, Sheldon X D ; Tirumala, Murli
Author_Institution
Univ. of California, Riverside
fYear
2008
fDate
21-24 March 2008
Firstpage
456
Lastpage
461
Abstract
In this paper, we investigate a new architecture-level thermal characterization problem from behavioral modeling perspective to address the emerging thermal related analysis and optimization problems for high-performance multi-core microprocessor design. We propose a new approach, called ThermPOF, to build the thermal behavioral models from the measured architecture thermal and power information. ThermPOF first builds the behavioral thermal model using generalized pencil-of-function (GPOF) method. And then to effectively model transient temperature changes, we proposed two new schemes to improve the GPOF. First we apply logarithmic-scale sampling instead of traditional linear sampling to better capture the temperature changing characteristics. Second, we modify the extracted thermal impulse response such that the extracted poles from GPOF are guaranteed to be stable without accuracy loss. To further reduce the model size, Krylov subspace based model order reduction is performed to reduce the order of the models in the state-space form. Experimental results on a practical quad-core microprocessor show that generated thermal behavioral models match the measured data very well.
Keywords
microprocessor chips; multiprocessing systems; optimisation; temperature measurement; Krylov subspace model; ThermPOF; architecture-level thermal behavioral characterization; architecture-level thermal characterization problem; behavioral modeling; behavioral thermal model; generalized pencil-of-function method; high-performance multicore microprocessor design; linear sampling; logarithmic-scale sampling; multicore microprocessors; optimization problems; quad-core microprocessor; state-space form; temperature changing characteristics; thermal behavioral models; thermal impulse response extraction; thermal related analysis; transient temperature change model; CMOS technology; Design optimization; Microprocessors; Packaging; Power measurement; Power system modeling; Sampling methods; Semiconductor device modeling; Temperature; Thermal engineering;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location
Seoul
Print_ISBN
978-1-4244-1921-0
Electronic_ISBN
978-1-4244-1922-7
Type
conf
DOI
10.1109/ASPDAC.2008.4483994
Filename
4483994
Link To Document