DocumentCode
3230463
Title
Investigation of diffusion rounding for post-lithography analysis
Author
Gupta, Puneet ; Kahng, Andrew ; Kim, Youngmin ; Shah, Shalin ; Sylvester, Dennis
Author_Institution
Univ. of California, Los Angeles
fYear
2008
fDate
21-24 March 2008
Firstpage
480
Lastpage
485
Abstract
Due to aggressive scaling of device feature size to improve circuit performance in the sub-wavelength lithography regime, both diffusion and poly gate shapes are no longer rectilinear. Diffusion rounding occurs most notably where the diffusion shapes are not perfectly rectangular, including common L and T-shaped diffusion layouts to connect to power rails. This paper investigates the impact of the non-rectilinear shape of diffusion (i.e., sloped diffusion or diffusion rounding) on circuit performance (delay and leakage). Simple weighting function models for Ionmiddot and Ioff to account for the diffusion rounding effects are proposed, and compared with TCAD simulation. Our experiments show that diffusion rounding has an asymmetric characteristic for Ioff due to the differing significance of source/drain junctions on device threshold voltage. Therefore, we can model Ionmiddot and Ioff as a function of slope angle and direction. The proposed models match well with TCAD simulation results, with less than 2% and 6% error in Ionmiddot and Ioff, respectively.
Keywords
lithography; technology CAD (electronics); L-shaped diffusion layouts; T-shaped diffusion layouts; TCAD simulation; diffusion rounding; diffusion shapes; post-lithography analysis; power rails; sloped diffusion; CMOS technology; Circuit optimization; Delay; Design for manufacture; Lithography; MOSFETs; Manufacturing; Semiconductor device modeling; Shape; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location
Seoul
Print_ISBN
978-1-4244-1921-0
Electronic_ISBN
978-1-4244-1922-7
Type
conf
DOI
10.1109/ASPDAC.2008.4483998
Filename
4483998
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