Title :
Minimal majority gate mapping of 4-variable functions for quantum cellular automata
Author :
Wang, Peng ; Niamat, Mohammed ; Vemuru, Srinivasa
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of Toledo, Toledo, OH, USA
Abstract :
Three-input majority gates and inverters form the basic Boolean primitive logic blocks of quantum cellular automata (QCA) circuits. Ideally, an optimized QCA design should have minimal number of gate counts and logic levels. However, existing majority gate logic synthesis methods based on three-feasible networks often result in inefficient use of majority logic gates. In this paper, we propose an improved majority gate logic synthesis technique and present a total of 143 four-variable standard functions and their majority gate implementations. These functions can be incorporated in the majority gate synthesis tools giving more efficient logic implementations. For the 13 MCNC benchmarks presented in this paper, the proposed approach yields a combined reduction of 16.2% in the number of gate counts and 5.21% in the number of levels when compared with the existing method.
Keywords :
cellular automata; invertors; logic design; logic gates; network synthesis; quantum optics; Boolean primitive logic block; inverter; majority gate logic synthesis method; majority gate synthesis tools; minimal majority gate mapping; quantum cellular automata circuit; quantum cellular automata design; three-input majority gates; Benchmark testing; Hamming distance; Inverters; Logic functions; Logic gates; Vectors; logic synthesis; majority gates; quantum cellular automata (QCA);
Conference_Titel :
Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
Conference_Location :
Portland, OR
Print_ISBN :
978-1-4577-1514-3
Electronic_ISBN :
1944-9399
DOI :
10.1109/NANO.2011.6144617