DocumentCode :
3233013
Title :
High-performance inverse transform circuit based on butterfly architecture for H.264 high profile decoder
Author :
Chang, Hoyoung ; Cho, Kyeongsoon
Author_Institution :
Dept. of Electron. Eng., Hankuk Univ. of Foreign Studies, Yongin, South Korea
fYear :
2010
fDate :
6-9 Dec. 2010
Firstpage :
394
Lastpage :
397
Abstract :
This paper proposes the high-performance architecture of unified inverse transform circuit for H.264/AVC high profile decoder. Four processing elements operate in parallel to achieve the high performance. Two-stage pipeline technique is applied in each processing element. All inverse transforms required in H.264/AVC high profile decoding are covered by the proposed circuit. Our circuit consists of 29,731 gates and its maximum operation frequency is 107MHz when synthesized using 130nm standard cell library.
Keywords :
decoding; hypercube networks; inverse transforms; video codecs; H.264 high profile decoder; butterfly architecture; inverse transform circuit; processing element; standard cell library; two stage pipeline technique; Clocks; Computer architecture; Decoding; Pixel; Streaming media; Transform coding; Transforms; H.264/AVC Decoder; High profile; Inverse Transform; Unified Architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-7454-7
Type :
conf
DOI :
10.1109/APCCAS.2010.5775075
Filename :
5775075
Link To Document :
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