Synchronization and power integrity issues in 3-D ICs

Author

Pavlidis, Vasilis F. ; Xu, Hu ; Tsioutsios, Ioannis ; De Micheli, Giovanni

Author_Institution

Integrated Syst. Lab., EPFL, Lausanne, Switzerland

fYear

2010

fDate

6-9 Dec. 2010

Firstpage

536

Lastpage

539

Abstract

Several challenges should be resolved for three-dimensional integration to evolve to a mainstream technology. Among these challenges, the issues of synchronization and power integrity become predominant due to the multiple planes and the heterogeneity of 3-D circuits. The paper offers an overview of the state of the art research related to these global in nature issues. Experimental results, design techniques, and models are discussed highlighting the possible means and requirements for the design of reliable synchronization and power distribution schemes in 3-D circuits.

Keywords

integrated circuit design; integrated circuit modelling; power distribution; synchronisation; three-dimensional integrated circuits; 3D IC; power distribution; power integrity; synchronization; three-dimensional integration; Clocks; Integrated circuit interconnections; Integrated circuit modeling; Network topology; Synchronization; Three dimensional displays; Topology; 3-D integration; clock distribution networks; power distribution networks; synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4244-7454-7

Type

conf

DOI

10.1109/APCCAS.2010.5775082

Filename

5775082