DocumentCode :
3234639
Title :
ABD1: Formal models for verification and debug
Author :
Borrione, Dominique
Author_Institution :
TIMA Laboratory
fYear :
2010
fDate :
14-16 Sept. 2010
Firstpage :
1
Lastpage :
1
Abstract :
The first paper defines an operational model for specifying application specific programmable modules, and a methodology to perform the automatic generation of safety properties as well as the formal proof of correctness of a pipelined implementation. The second paper presents a typology of programming and design faults, and characterizes them as a mutation of the design Control Dependence Graph, as a basis for a debugging procedure. In the third paper, SystemC-OSSS descriptions are transformed into a formal model called "function network", for the verification of temporal and safety requirements.
fLanguage :
English
Publisher :
iet
Conference_Titel :
Specification & Design Languages (FDL 2010), 2010 Forum on
Conference_Location :
Southampton, UK
Type :
conf
DOI :
10.1049/ic.2010.0161
Filename :
5775156
Link To Document :
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