• DocumentCode
    3236595
  • Title

    Mutual testing based on wavelet transforms

  • Author

    Ravikumar, C.P. ; Kakkar, Nitin ; Chopra, Saurabh

  • Author_Institution
    Texas Instruments India, Bangalore, India
  • fYear
    2003
  • fDate
    4-8 Jan. 2003
  • Firstpage
    347
  • Lastpage
    352
  • Abstract
    Mutual testing is a technique for both on-line and off-line built-in self-test in VLSI circuits. The essential idea in mutual testing is that if identical test patterns are applied to the circuit under test and its alternate implementation, the two must generate identical outputs. The circuit is declared faulty if the outputs do not match in content. Mutual testing will fail if the waveforms are compared in time, since the alternate implementations of the circuit may differ in speed, making it necessary to apply tests at different clock rates. Even when the two implementations are instantiations of the same block, their responses to identical inputs will differ in frequency, phase, noise content, and amplitude, depending on the physical placement of the two instances. We describe the use of the Discrete Wavelet Transform to compare the two signals in time as well as frequency domains. The proposed technique has several benefits. It reduces the yield loss due to misclassification of good circuits due to incorrect comparison. Secondly, it permits the at-speed testing of a block even when the alternate implementation of the block is tested at a slower speed. The test power reduction due to slower-speed testing of the alternate implementation is also a distinct advantage.
  • Keywords
    VLSI; automatic test pattern generation; built-in self test; discrete wavelet transforms; frequency-domain analysis; integrated circuit testing; time-domain analysis; wavelet transforms; VLSI circuits; at-speed testing; built-in self-test; circuit under test; clock rates; discrete wavelet transform; frequency domains; identical test patterns; mutual testing; physical placement; test power reduction; time domains; wavelet transforms; yield loss; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Clocks; Discrete wavelet transforms; Impedance matching; Test pattern generators; Very large scale integration; Wavelet transforms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2003. Proceedings. 16th International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-1868-0
  • Type

    conf

  • DOI
    10.1109/ICVD.2003.1183161
  • Filename
    1183161