Reconfigurable fast memory management system design for application specific processors

Author

Agun, S. Kagan ; Chang, Morris

Author_Institution

Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA

fYear

2003

fDate

20-21 Feb. 2003

Firstpage

92

Lastpage

97

Abstract

This paper presents the design and implementation of the new active memory manager unit (AMMU) designed to be embedded into system-on-chip CPUs. The unit is implemented using VHDL in field programmable gate array (FPGA) technology. The modified buddy system is used as the hardware algorithm for memory management. A RISC compatible open-source CPU is deployed with the memory management unit to demonstrate the feasibility of implementation. The results indicate that the proposed AMMU achieves high performance in memory allocation and deallocation for software systems.

Keywords

embedded systems; field programmable gate arrays; hardware description languages; logic design; reconfigurable architectures; reduced instruction set computing; storage management; storage management chips; system-on-chip; AMMU; FPGA; RISC compatible open-source CPU; SoC; VHDL; active memory manager unit; application specific processors; embedded CPU; field programmable gate array; memory allocation; memory deallocation; memory management; modified buddy system; reconfigurable fast memory management system; system-on-chip; Application software; Application specific processors; Binary trees; Computer Society; Field programmable gate arrays; Hardware; Memory management; Reduced instruction set computing; Very high speed integrated circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on

Print_ISBN

0-7695-1904-0

Type

conf

DOI

10.1109/ISVLSI.2003.1183358

Filename

1183358