DocumentCode :
3240978
Title :
Effective use of line termination in high speed logic
Author :
Hronik, Stanley
fYear :
1995
fDate :
7-9 Nov. 1995
Firstpage :
72
Abstract :
As system speed increases, the time available to make signal logic level transitions decreases. The goal is to have a rapid, quiet transition from level to level, making the final signal level available to any receivers at the earliest possible time. One result of this is a very fast signal edge rate which can cause reflection and termination problems in the circuit if the circuit is not properly designed. Looking at high speed logic components, internally the component can have control over the edge rate by how fast the output turns on. Very high speed logic must have a fast turn on rate to achieve fast throughput. The fast turn on/edge rate can cause line reflection problems producing transmission line effects
Keywords :
Acoustic reflection; Clocks; Distributed parameter circuits; Drives; Equations; Inductance; Logic arrays; Logic devices; Signal design; Transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies'
Conference_Location :
San Francisco, CA, USA
ISSN :
1095-791X
Print_ISBN :
0-7803-2636-9
Type :
conf
DOI :
10.1109/WESCON.1995.485255
Filename :
485255
Link To Document :
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