DFT for fast testing of self-timed control circuits

Author

Pagey, Sandeep ; Khoche, Ajay ; Brunvand, Erik

Author_Institution

Cadence Design Syst. Ltd., Noida, India

fYear

1995

fDate

23-24 Nov 1995

Firstpage

382

Lastpage

386

Abstract

In this paper, we present a methodology to perform fast testing of the control path of self-timed circuits. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compiler (1991). This Compiler translates an OCCAM program description into an interconnection of pre-existing self-timed macro-modules (1989, 1991). The method proposed involves modifying certain modules and structures in such a way that the circuits obtained by translation using these modified modules are testable in above mentioned way

Keywords

asynchronous circuits; automatic test software; delays; design for testability; fault diagnosis; logic CAD; logic testing; program compilers; DFT; OCCAM based circuit compiler; OCCAM program; execution paths; fast testing; macromodules; modified modules; self-timed control circuits; self-timed macro-modules; simultaneous testing; translation; Asynchronous circuits; Automatic testing; Circuit faults; Circuit synthesis; Circuit testing; Clocks; Design for testability; Libraries; Performance evaluation; Protocols;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1995., Proceedings of the Fourth Asian

Conference_Location

Bangalore

Print_ISBN

0-8186-7129-7

Type

conf

DOI

10.1109/ATS.1995.485364

Filename

485364