DocumentCode :
3245720
Title :
RTL design source management for system-on-a-chip designs
Author :
Blaner, Bart ; King, Christine ; Stabler, Paul C.
Author_Institution :
IBM Microelectronics, Esex Junction, VT, USA
fYear :
1998
fDate :
15-17 Sep 1998
Firstpage :
147
Lastpage :
152
Abstract :
Increasingly, system-on-a-chip (SOC) designers are looking to leverage the expertise of design service providers to bring products to market. Design service providers may be engaged at various points in the design process: from design conception and specification to processing a completed technology dependent netlist. Engagement typically occurs at a stage intermediate to these points; completed RTL for some portion of the design may exist but assistance is needed to integrate the RTL with other core IF, or design services may be enlisted to develop some portion of the RTL or new cores to perform specific functions. Proper management of RTL design source is critical to the overall success of a project. This paper describes a methodology used by a design service provider to address this issue
Keywords :
application specific integrated circuits; integrated circuit design; logic CAD; project management; RTL design source management; SOC; design methodology; design service providers; project management; system-on-a-chip designs; technology dependent netlist; Logic design; Logic devices; Logic testing; Microelectronics; Process design; Project management; Random access memory; Read only memory; Registers; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wescon/98
Conference_Location :
Anaheim, CA
ISSN :
1095-791X
Print_ISBN :
0-7803-5078-2
Type :
conf
DOI :
10.1109/WESCON.1998.716437
Filename :
716437
Link To Document :
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