Title :
Design and realization of multi-port register file based on FPGA
Author :
Li-hua Jiang ; Li, Ya-Qin
Author_Institution :
Dept.of Comput., Wuhan Polytech. Univ., Wuhan, China
Abstract :
In cpu design, the register file is a necessary device which save the instruction and data. In this paper, we propose a design method for multi-port register file design in the environment of single-cycle CPU system based on the MIPS instruction set and according to the characteristics of multi-port register file,and the VHDL langauge is introduced in order to speed up the development cycle. Furthermore, we discuss the consideration and operational principle of design and realization in detail. The simulation results for the part constructed by FPGA are also presented. In this example which provides the learning and design innovation for other circuit designed.
Keywords :
field programmable gate arrays; hardware description languages; hardware-software codesign; programmable logic devices; FPGA; MIPS instruction set; VHDL langauge; cpu design; multi-port register file; programmable logic device; single-cycle CPU system; Artificial neural networks; Field programmable gate arrays; Registers; FPGA; Multi-port register file; Programmable Logic Device; VHDL;
Conference_Titel :
Knowledge Acquisition and Modeling (KAM), 2010 3rd International Symposium on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-8004-3
DOI :
10.1109/KAM.2010.5646298
