DocumentCode
3248972
Title
Design and characterization of vertical mesh capacitors in standard CMOS
Author
Christensen, K.T.
Author_Institution
Tech. Univ. Denmark, Lyngby, Denmark
fYear
2001
fDate
14-16 June 2001
Firstpage
201
Lastpage
204
Abstract
This paper shows how good RF capacitors can be made in a standard digital CMOS process. The capacitors which are also well suited for binary weighted switched capacitor banks show very good RF performance: Q-values of 57 at 4.0 GHz, a density of 0.27 fF//spl mu/2, 2.2 /spl mu/m wide shielded unit capacitors, 6% bottom plate capacitance, better than 3-5% process variation and negligible series inductance. Further, a simple yet accurate method is presented that allows hand calculation of the capacitance value.
Keywords
CMOS integrated circuits; Q-factor; UHF integrated circuits; capacitance; capacitors; field effect MMIC; integrated circuit metallisation; 2.2 micron; 4 GHz; 8 GHz; Q-values; RF capacitors; binary weighted switched capacitor banks; capacitance value calculation; capacitor characterization; standard CMOS process; vertical mesh capacitors; CMOS process; Capacitors; Fingers; Inductance; Inductors; Mobile handsets; Parasitic capacitance; Radio frequency; Radiofrequency integrated circuits; Safety;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-014-3
Type
conf
DOI
10.1109/VLSIC.2001.934238
Filename
934238
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