Circuit-level electrothermal simulation of electrostatic discharge in integrated circuits

Author

Sonoda, Ken-ichiro ; Tanizawa, Motoaki ; Ishikawa, Kiyoshi ; Nishimura, Tadashi

Author_Institution

Adv. Device Dept., Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1999

fDate

1999

Firstpage

215

Lastpage

218

Abstract

A circuit-level electrothermal simulator, MICS (Mitsubishi Circuit Simulator), is presented with parasitic bipolar transistor action and lattice heating taken into account. Diffusion capacitance in parasitic bipolar transistors is introduced to cover turn-on behavior under short rise-time current. Device temperatures are simulated from calculated electrical characteristics and the closed-form solution of the heat transfer equation. Simulation results show that this tool is valuable in evaluating electrostatic discharge (ESD) robustness in integrated circuits

Keywords

MOSFET; circuit simulation; electrostatic discharge; integrated circuit modelling; semiconductor device breakdown; semiconductor device models; temperature distribution; ESD robustness; MICS; MOSFET model; Mitsubishi Circuit Simulator; circuit-level electrothermal simulation; closed-form solution; device temperature simulation; diffusion capacitance; electrical characteristics; electrostatic discharge; heat transfer equation; human body model; integrated circuits; lattice heating; parasitic bipolar transistor action; short rise-time current; turn-on behavior; Bipolar transistors; Circuit simulation; Electric variables; Electrostatic discharge; Electrothermal effects; Heating; Lattices; Microwave integrated circuits; Parasitic capacitance; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 1999. SISPAD '99. 1999 International Conference on

Conference_Location

Kyoto

Print_ISBN

4-930813-98-0

Type

conf

DOI

10.1109/SISPAD.1999.799299

Filename

799299