• DocumentCode
    3250690
  • Title

    Evolutionary algorithm based combinational circuit design

  • Author

    Rudra, Atri ; Pandey, Narendra ; Indu, S.

  • Author_Institution
    Dept. of Electron. & Commun. Eng., Delhi Technol. Univ., New Delhi, India
  • fYear
    2012
  • fDate
    6-8 Dec. 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The hardware that allows autonomous reconfiguration to learn and adapt autonomously from the environment is called Evolvable hardware; employs evolutionary algorithms on PLDs so that the configuration may be changed without human intervention. The systems employed in dynamic operating conditions must be able to adapt to situation e.g. performance of the space system may vary due to sudden high radiation and self adaptation is needed to restore the performance as soon as possible. This paper, suggests a design method to evolve a Genetic algorithm (GA) based combinational logic circuit. The method is verified by designing an even parity generator circuit.
  • Keywords
    combinational circuits; genetic algorithms; logic design; autonomous reconfiguration; combinational circuit design; combinational logic circuit; dynamic operating conditions; even parity generator circuit; evolutionary algorithm; evolvable hardware; genetic algorithm; space system; Biological cells; Combinational circuits; Evolutionary computation; Generators; Genetic algorithms; Hardware; Hardware design languages; Combinational logic circuit Verilog HDL; Evolutionary algorithms; Evolvable hardware; MATLAB; genetic algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics (IICPE), 2012 IEEE 5th India International Conference on
  • Conference_Location
    Delhi
  • ISSN
    2160-3162
  • Print_ISBN
    978-1-4673-0931-8
  • Type

    conf

  • DOI
    10.1109/IICPE.2012.6450479
  • Filename
    6450479