DocumentCode :
3253013
Title :
Optimization of Nanoscale Thyristors on SOI for High-Performance High-Density Memories
Author :
Yang, K.J. ; Gupta, R.N. ; Banna, S. ; Nemati, F. ; Cho, H.-J. ; Ershov, M. ; Tarabbia, M. ; Hayes, D. ; Robins, S.T.
Author_Institution :
T-RAM Semicond. Inc., Milpitas, CA
fYear :
2006
fDate :
2-5 Oct. 2006
Firstpage :
113
Lastpage :
114
Abstract :
In this paper, methods for achieving a manufacturable TCCT on SOI with excellent thermal stability and fast switching speed are reported for the first time. A carrier lifetime adjustment process was implemented and indium was used as a p-type dopant. By using these methods, we demonstrate a TCCT device with stable forward breakover voltage (Vfb) at 125degC and bipolar gain with significantly improved temperature response. Finally, we achieved a worst-case switching speed of less than 2.1 ns measured from a 9Mb T-RAM test chip
Keywords :
carrier lifetime; indium; memory architecture; nanoelectronics; silicon-on-insulator; thermal stability; thyristors; 125 C; SOI; TCCT device; carrier lifetime adjustment process; high-density memories; high-performance memories; nanoscale thyristors; switching speed; temperature response; thermal stability; Channel bank filters; Charge carrier lifetime; Indium; Pulp manufacturing; Semiconductor device measurement; Temperature; Thermal stability; Thyristors; Velocity measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
International SOI Conference, 2006 IEEE
Conference_Location :
Niagara Falls, NY
ISSN :
1078-621X
Print_ISBN :
1-4244-0289-1
Electronic_ISBN :
1078-621X
Type :
conf
DOI :
10.1109/SOI.2006.284460
Filename :
4062908
Link To Document :
بازگشت