DocumentCode :
3253998
Title :
Efficient time slot assignment algorithms in variable bit rate TDM switch
Author :
Saito, Tadao ; Aida, Hitoshi ; Bunworasate, Udomkiat ; Muranaka, Takayuki ; Aoki, Terumasa
Author_Institution :
Dept. of Inf. & Commun. Eng., Tokyo Univ., Japan
fYear :
1999
fDate :
1999
Firstpage :
119
Lastpage :
122
Abstract :
The VTDM switching architecture has been proposed as a new worthwhile solution for VBR video transmission. The VTDM requires real-time and efficient time slot assignment, which is performed in every frame period. We propose two algorithms that are efficient, fast and practical for hardware implementation
Keywords :
electronic switching systems; field programmable gate arrays; large scale integration; time division multiplexing; visual communication; FPGA; LSI chip; VBR video transmission; VHDL; VTDM switching architecture; algorithms; efficient time slot assignment algorithms; field programmable gate array; frame period; hardware implementation; input-queued switch; real-time slot assignment; variable bit rate TDM switch; virtual output queue; Bit rate; Communication switching; Hardware; Matrix decomposition; Scheduling algorithm; Streaming media; Switches; Switching systems; Telecommunication traffic; Time division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-5582-2
Type :
conf
DOI :
10.1109/PACRIM.1999.799492
Filename :
799492
Link To Document :
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