DocumentCode :
3254079
Title :
A novel delay balancing methodology for wave pipelined circuits
Author :
Tang, Rui ; Kim, Yong-Bin
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fYear :
2005
fDate :
7-10 Aug. 2005
Firstpage :
1035
Abstract :
This paper presents a novel effective methodology to balance the delays based on Wong´s algorithm and Klass´s algorithm. In order to reduce the area overhead and the number of delay elements added, a new repadding technique is introduced and included in this novel delay balancing methodology. Several computational blocks such as adders, multipliers are tested, and the simulation results show that the area overhead is reduced up to the factor of 3 comparing with the previous algorithms.
Keywords :
adders; delays; logic design; multiplying circuits; Klass algorithm; Wong algorithm; adders; delay balancing method; delay element; digital circuit design; multipliers; repadding technique; wave pipelined circuit; Added delay; Adders; Circuit synthesis; Clocks; Combinational circuits; Delay effects; Frequency; Logic; Propagation delay; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. 48th Midwest Symposium on
Print_ISBN :
0-7803-9197-7
Type :
conf
DOI :
10.1109/MWSCAS.2005.1594281
Filename :
1594281
Link To Document :
بازگشت