DocumentCode
3254239
Title
Sliceable transformation of nonslicing floorplans based on vacant block insertion in LB-packing process
Author
Yan, Jin-Tai ; Lin, Kai-Ping ; Huang, Chun-Tsai
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Chung Hua Univ., Hsinchu
fYear
2005
fDate
7-10 Aug. 2005
Firstpage
1075
Abstract
In this paper, based on the maintenance of a dynamic sliceable structure in an LB-packing-based compact floorplan, some vacant blocks are incrementally inserted into the original floorplan to transform a non-slicing floorplan into a slicing floorplan. Finally, a final slicing floorplan can be obtained from the original LB-compact floorplan. The experimental results show that the area increase after running our proposed sliceable transformation is 3.5% on the average for the tested benchmark floorplans. Clearly, the proposed LB-packing-based approach is more effective than the previous FTP-1 algorithm. Basically, the LB-packing-based approach can serve as a post-processing phase for other nonslicing floorplan algorithms
Keywords
VLSI; circuit layout; circuit optimisation; integrated circuit layout; FTP-1 algorithm; LB-compact floorplan; LB-packing process; sliceable transformation; slicing floorplan; vacant block insertion; Benchmark testing; Computer industry; Computer science; Design automation; Fabrication; Integrated circuit interconnections; Routing; Shape; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location
Covington, KY
Print_ISBN
0-7803-9197-7
Type
conf
DOI
10.1109/MWSCAS.2005.1594291
Filename
1594291
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