DocumentCode
3255185
Title
Real-Time Implementation of Voltage Dip Mitigation using D-STATCOM with Fast Extraction of Instantaneous Symmetrical Components
Author
Manmek, Thip ; Mudannayake, Chathura P.
Author_Institution
Mahanakorn Univ. of Technol., Bangkok
fYear
2007
fDate
27-30 Nov. 2007
Firstpage
568
Lastpage
575
Abstract
This paper presents the application of the proposed efficient least squares algorithm in power supply voltage dip and unbalance detection for mitigation using a D-STATCOM. The proposed method is capable of identifying the instantaneous symmetrical components of the fundamental frequency accurately even though the point of common coupling voltage is strongly corrupted by the voltage harmonics. Also, it fulfils the specific requirements of the fast transient response, accuracy and robustness in order to ensure the satisfactory performance of the mitigation system. The proposed method extracts detecting the positive- and negative-sequence components and then using those sequence components for generating reference values of current that need to be injected into the point of connection D-STATCOM in order to compensate the voltage errors. Furthermore, the suitability of the proposed method in balanced/unbalance voltage dip compensation is verified by a experimental studies.
Keywords
error compensation; harmonic distortion; least squares approximations; power distribution control; power supply quality; static VAr compensators; D-STATCOM; distribution network; instantaneous symmetrical components; least squares algorithm; negative-sequence components; point-of-common coupling voltage; positive-sequence components; power supply voltage dip mitigation; transient response; unbalance detection; voltage error compensation; voltage harmonics; Automatic voltage control; Converters; Data mining; Frequency; Least squares methods; Phase detection; Phase locked loops; Power conversion; Voltage control; Voltage fluctuations; D-STATCOM; instantaneous symmetrical component; least squares algorithm; voltage unbalance and voltage dip detection method;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics and Drive Systems, 2007. PEDS '07. 7th International Conference on
Conference_Location
Bangkok
Print_ISBN
978-1-4244-0645-6
Electronic_ISBN
978-1-4244-0645-6
Type
conf
DOI
10.1109/PEDS.2007.4487758
Filename
4487758
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