A novel gain control LNA for 2.4GHz application using 0.18/spl mu/m CMOS

This paper presents a novel gain control method for 2.4 GHz LNA applications. In this design, a digital mode gain control concept was implemented. This chip can accept an appropriate control bit that come from base band to achieve power saving. With digital mode gain control to achieve low noise and high 1dB compression point simultaneously without increasing any circuit and power consumption. Depend on receiving signal strength, there are four gain modes can be selecting automatically. The compact CMOS LNA is optimized for low-power-consuming ISM band applications and is fabricated using commercial 0.18mum CMOS process. With current re-use technology, the power consumption and linearity can be optimizing. The fully integrated 2.4GHz gain controllable LNA exhibits 15.2dB maximum gain, 4.1dB minimum gain, respectively. Also, the LNA has excellent noise performance at high gain mode; 1.55dB of noise figure is achieved in this work. The digital modes gain controllable LNA produces a 1-dB compression output power of -10 dBm. It consumes 2.5mA current from a supply voltage of 1.8V