DocumentCode :
3256067
Title :
Recessed trench MOSFET process without critical alignments makes very high densities possible
Author :
Finney, Adrian ; Evans, Dr Jonathan ; Blair, Peter ; Earnshaw, John ; Jerred, Paul ; Lowe, Kevin ; Mottram, David ; Wolstenholme, Neil ; Wood, Andrew
fYear :
2001
fDate :
2001
Firstpage :
283
Lastpage :
286
Abstract :
Trench MOSFETs have opened the way to extremely high-density devices with correspondingly lower on-resistances. However, in practice, it has proved difficult to fully exploit this structure because fabrication requires critical submicron alignments between the various layers. A new recessed gate structure that requires no critical alignments within the active area is presented for the first time. Whilst simplifying the manufacturing procedure, this also opens the way for higher density trench MOSFETs with even lower on-resistances
Keywords :
etching; isolation technology; power MOSFET; semiconductor device breakdown; semiconductor device models; semiconductor process modelling; breakdown voltage; critical submicron alignments; device modeling; extremely high-density devices; higher density trench MOSFETs; low on-resistance; manufacturing procedure; mesa pattern; polysilicon etchback; process modeling; punch-through voltage; recessed trench MOSFET process; single mask; Bipolar transistors; Electric breakdown; Etching; Fabrication; Implants; MOSFET circuits; Manufacturing; Power MOSFET; Programmable control; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on
Conference_Location :
Osaka
ISSN :
1063-6854
Print_ISBN :
4-88686-056-7
Type :
conf
DOI :
10.1109/ISPSD.2001.934610
Filename :
934610
Link To Document :
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