Time-domain behavioral modeling of a multigigahertz digital RF oscillator using VHDL

A time-domain event-driven VHDL simulation technique for modeling a multigigahertz radio-frequency digitally controlled oscillator (DCO) for wireless applications is presented. The model includes various phase noise mechanisms including flicker (1/f noise), thermal wander, jitter and flat electronic quantization noise due to the digital control using time-domain equations. The noise models are implemented as either accumulative or non-accumulative random perturbations of the fundamental oscillator period. Furthermore, the effects of delay and skew in the digital input bits to the DCO as well as substrate coupling of other clock domains within the same chip has been discussed. The proposed technique is well suited to investigate complex interactions in large system-on-chip systems, which cannot be studied using conventional RF and analog simulation tools. The presented simulation technique has been successfully applied and validated in fully-compliant Bluetooth and GSM transceiver integrated circuits fabricated in digital 130-nm and 90-nm processes, respectively