• DocumentCode
    3257002
  • Title

    Hardware synchronization of massively parallel processes in distributed systems

  • Author

    Makhaniok, M. ; Manner, R.

  • Author_Institution
    Inst. of Eng., Acad. of Sci., Minsk, Byelorussia
  • fYear
    1997
  • fDate
    18-20 Dec 1997
  • Firstpage
    157
  • Lastpage
    164
  • Abstract
    In this paper a new method is proposed to synchronize massively parallel processes in distributed multiprocessor systems. The method is an extension of that used in arbitration systems like Futurebus+. It also uses three global synchronization lines and a distributed synchronizer, and can be applied without changes to the existing hardware. The method allows to carry out two alternative synchronization protocols where the end of the operation is either forced by any processor or individual a moment when all processors completed their individual parts. Application of this method, e.g., to the arbitration process allows to reduce the arbitration time in average by a factor of 2
  • Keywords
    concurrency control; parallel architectures; synchronisation; distributed; global synchronization lines; massively parallel processes; synchronization; synchronization protocols; Backplanes; Clocks; Cybernetics; Distributed processing; Hardware; Logic; Multiprocessing systems; Protocols; Signal processing; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Architectures, Algorithms, and Networks, 1997. (I-SPAN '97) Proceedings., Third International Symposium on
  • Conference_Location
    Taipei
  • ISSN
    1087-4089
  • Print_ISBN
    0-8186-8259-6
  • Type

    conf

  • DOI
    10.1109/ISPAN.1997.645087
  • Filename
    645087