DocumentCode :
3257141
Title :
Optimization of primitive gate networks using multiple output two-level minimization
Author :
Malik, Abdul A.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
1992
fDate :
8-12 Jun 1992
Firstpage :
449
Lastpage :
453
Abstract :
A novel method for the optimization of a primitive gate network is presented. The author explains why a primitive gate representation may be necessary in certain situations and describes the problems associated with using two-level minimization in that case. He then describes a method for applying two-level minimization for the optimization of a primitive gate network. The approach is based on multiple-output two-level minimization as in MIS. It was effective in reducing the number of gates and connections in a network while maintaining the primitive gate representation
Keywords :
logic circuits; logic design; minimisation of switching nets; multiple output two-level minimization; primitive gate networks optimisation; Logic; Minimization methods; Network synthesis; Optimization methods; Size measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
Conference_Location :
Anaheim, CA
ISSN :
0738-100X
Print_ISBN :
0-8186-2822-7
Type :
conf
DOI :
10.1109/DAC.1992.227761
Filename :
227761
Link To Document :
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