Technology-Based Static Figure of Merit for High Voltage ICs

Author

Iqbal, M.M. ; Udrea, F.

Author_Institution

Dept. of Eng., Cambridge Univ.

Volume

2

fYear

2006

fDate

27-29 Sept. 2006

Firstpage

417

Lastpage

420

Abstract

This paper introduces for the first time a technology-based static figure of merit (FOM) for lateral high voltage MOSFETs (LDMOSFETs). Established figures of merit in the power semiconductor arena take into account material properties only. Here we show that the static performance of lateral power devices is very significantly influenced by the power IC technologies. Hence we develop a technology FOM that couples the breakdown voltage with the specific on-state resistance. The FOM is based on numerical simulation results and verified with the reported experimental data from different JI and SOI technologies

Keywords

numerical analysis; power MOSFET; power integrated circuits; power semiconductor devices; silicon-on-insulator; JI technologies; LDMOSFET; MOSFET; SOI technologies; breakdown voltage; high voltage integrated circuits; lateral power devices; on-state resistance; power IC technologies; power semiconductor; technology-based static figure of merit; Doping; Epitaxial layers; Isolation technology; Magneto electrical resistivity imaging technique; Paper technology; Power integrated circuits; Silicon; Substrates; Thin film devices; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

International Semiconductor Conference, 2006

Conference_Location

Sinaia

Print_ISBN

1-4244-0109-7

Type

conf

DOI

10.1109/SMICND.2006.284034

Filename

4063262