Title :
Analysis of HBM and MM ESD failures in nMOS devices
Author :
Beh, Michelle ; Kang, Clara ; Natarajan, M. ; Radhakrishnan, M.K.
Author_Institution :
Inst. of Microelectron., Singapore
fDate :
27 Nov-1 Dec 1995
Abstract :
The response and failure mechanisms of typical protection networks used in nMOS technology under simulated HBM and MM ESD stressing conditions are presented in this paper. The HBM stressing resulted in failures which are predominantly cumulative in nature, whereas MM stress caused abrupt and catastrophic failures. Under HBM stressing the failure modes are found to be increase in leakage current, resistive short and open circuit. The failures induced by MM stressing are mostly resistive short or open circuit. The failure analysis revealed the failure mechanisms to be contact spiking and electrothermomigration for those devices which do not have polysilicon strap in the protection circuit. Isolation oxide degradation and junction burn out following parasitic transistor turn-on are the failure mechanisms observed in those devices with the poly strap
Keywords :
MOS integrated circuits; electromigration; electrostatic discharge; failure analysis; integrated circuit reliability; leakage currents; protection; ESD stressing conditions; HBM ESD failures; MM ESD failures; NMOS devices; contact spiking; electrothermomigration; failure analysis; failure mechanisms; failure modes; human body model; isolation oxide degradation; junction burn out; leakage current; machine model; nMOS technology; parasitic transistor turn-on; polysilicon strap; protection networks; resistive open circuit; resistive short circuit; Biological system modeling; Circuit simulation; Circuit testing; Degradation; Electrostatic discharge; Failure analysis; MOS devices; Protection; Resistors; Stress;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1995., Proceedings of the 1995 5th International Symposium on the
Print_ISBN :
0-7803-2797-7
DOI :
10.1109/IPFA.1995.487606