DocumentCode
325966
Title
The impact of encoding algorithms on MPEG VLSI implementation
Author
Cheng, Sheu-Chih ; Hang, Hsueh-Ming
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
4
fYear
1998
fDate
31 May-3 Jun 1998
Firstpage
102
Abstract
The goal of this paper is to study the impact of MPEG encoding algorithms from a system-level design viewpoint. An area-time estimation tool is developed to extract the timing requirement and silicon area for various combinations of hardware modules and algorithms. After complemented the design of several modules in an MPEG encoder, we found that the motion estimation and rate control modules consume most part of the silicon area in the encoding chip. We also evaluated the entire chip area of a few cases for two picture formats. The methodology and results presented here should provide useful guidelines in selecting an appropriate MPEG encoding algorithm for VLSI design
Keywords
VLSI; circuit CAD; integrated circuit design; motion estimation; video coding; MPEG VLSI implementation; MPEG encoding algorithm; Si area; VLSI design; area-time estimation; encoding algorithms; system-level design; Algorithm design and analysis; Encoding; Guidelines; Hardware; Motion control; Motion estimation; Silicon; System-level design; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-4455-3
Type
conf
DOI
10.1109/ISCAS.1998.698768
Filename
698768
Link To Document