DocumentCode
3259665
Title
Plasma damage study using fully processed MOS transistors
Author
Prabhakar, V. ; Brozek, Tomasz ; Li, X. ; Chan, Y.D. ; Viswanathan, C.R.
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
1995
fDate
27 Nov-1 Dec 1995
Firstpage
140
Lastpage
144
Abstract
MOS transistors with different antenna ratios were used to study plasma etching damage in this work. Electrical techniques that can only be used in MOS transistors, such as transconductance noise measurements, charge pumping measurements, and gate induced drain leakage measurements (GIDL) were employed to study plasma damage at the gate edges. Experiments were also performed to determine hot carrier reliability, and the results indicate the importance of plasma induced damage for actual device operation
Keywords
MOSFET; hot carriers; leakage currents; semiconductor device noise; semiconductor device reliability; sputter etching; GIDL; antenna ratios; charge pumping measurements; fully processed MOS transistors; gate induced drain leakage measurements; hot carrier reliability; plasma etching; plasma induced damage; transconductance noise measurements; Antenna measurements; Charge measurement; Current measurement; Electric variables measurement; Etching; MOSFETs; Noise measurement; Plasma applications; Plasma devices; Plasma measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits, 1995., Proceedings of the 1995 5th International Symposium on the
Print_ISBN
0-7803-2797-7
Type
conf
DOI
10.1109/IPFA.1995.487612
Filename
487612
Link To Document