DocumentCode :
326027
Title :
A bipolar semi-custom PLL-based synthesizer for GSM and DCS systems
Author :
Hakkinen, Juha ; Rahkonen, Timo ; Kostamovaara, Juha
Author_Institution :
Dept. of Electr. Eng., Oulu Univ., Finland
Volume :
4
fYear :
1998
fDate :
31 May-3 Jun 1998
Firstpage :
413
Abstract :
A versatile synthesizer chip capable of operating with an output signal of up to 2 GHz and a reference signal of up to 20 MHz was designed in MAXIM´s GST-2 Process using QuickChip-960D transistor array. The circuit includes the basic building blocks of a complete PLL-based synthesizer except for the VCO and the loop filter. The chip has an internal dual modulus prescaler operating in 8/9 or 16/17 mode. The circuit has a 10 bit M counter and a 4 bit pulse swallow counter and a phase-frequency detector. The level of the PFD output can be set externally from 0.5 mA to 5.0 mA. Depending on the PFD output level, the circuit uses from 90 mA to 122 mA from a 5 V supply. The differences between the full custom and semi-custom design processes are discussed and attention is paid to the minimization of device usage
Keywords :
application specific integrated circuits; bipolar analogue integrated circuits; cellular radio; frequency synthesizers; phase locked loops; 0.5 to 5.0 mA; 2 GHz; 5 V; 90 to 122 mA; DCS; GSM; MAXIM GST-2 process; QuickChip-960D transistor array; internal dual modulus prescaler; phase-frequency detector; pulse swallow counter; semi-custom PLL-based synthesizer; Counting circuits; Distributed control; Filters; GSM; Phase frequency detector; Pulse circuits; Signal design; Signal processing; Synthesizers; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
Type :
conf
DOI :
10.1109/ISCAS.1998.698894
Filename :
698894
Link To Document :
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