• DocumentCode
    3260367
  • Title

    SAVS: a self-adaptive variable supply-voltage technique for process-tolerant and power-efficient multi-issue superscalar processor design

  • Author

    Li, Hai ; Chen, Yiran ; Roy, Kaushik ; Koh, Cheng-Kok

  • Author_Institution
    Qualcomm Inc., San Diego, CA, USA
  • fYear
    2006
  • fDate
    24-27 Jan. 2006
  • Abstract
    Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) technique for multi-issue out-of-order pipeline to improve parametric yield with minimal power dissipation. Our error-correction circuitry and recovery mechanism allow the proposed fault-tolerant pipeline to work at a dynamically tuned supply voltage with a very low error rate. Experiments on an 8-issue, out-of-order superscalar processor show that SAVS can achieve 93.3% yield with 8.66% total power reduction under a scaled Vdd, compared to the same yield achieved by conventional microarchitecture. The increased execution time is negligible (0.014%).
  • Keywords
    error correction; fault tolerance; low-power electronics; microprocessor chips; error-correction circuitry; fault-tolerant pipeline; microarchitecture; recovery mechanism; self-adaptive variable supply-voltage technique; sub-wavelength optical lithography; superscalar processor design; technology scaling; Error analysis; Fault tolerance; Lithography; Nonlinear optics; Out of order; Pipelines; Power dissipation; Process design; Tuned circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 2006. Asia and South Pacific Conference on
  • Print_ISBN
    0-7803-9451-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2006.1594675
  • Filename
    1594675