Title :
FSM-based test generation methods-a survey
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Abstract :
Due to the complexity of test generation for sequential circuits using gate level models, there has been considerable interest in finite state machines as high level models for test generation. The author surveys recent work in this area, and discusses different ways in which FSM models have been used in test generation
Keywords :
finite state machines; logic testing; sequential circuits; FSM models; FSM-based test generation; finite state machines; functional test; gate level test; high level models; sequential circuits; Automata; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Logic arrays; Logic testing; Sequential analysis; Sequential circuits;
Conference_Titel :
Euro ASIC '92, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-2845-6
DOI :
10.1109/EUASIC.1992.228025
