Title :
Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs
Author :
Oh, Hyunok ; Dutt, Nikil ; Ha, Soonhoi
Author_Institution :
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
Abstract :
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to minimize data memory and code memory size simultaneously. While a single appearance schedule promises only one appearance of each node definition in the generated code, it requires significant amount of data memory overhead compared with a buffer optimal schedule allowing multiple appearance. The key idea of the proposed technique is to make a dynamic decision of loop count to make a schedule quasi-static. The proposed quasi-static schedule produces a single appearance schedule code with minimum data memory requirement. We prove that every buffer optimal schedule can be transformed to our single appearance schedule which requires optimal buffer size for arbitrary synchronous dataflow graphs. The only penalty for the proposed technique is slight performance overhead of computing loop counts dynamically. In order to minimize the overhead we propose optimization techniques. Experimental results show that the proposed algorithm reduces 20% total memory with less than 1% performance overhead compared with the previous single appearance schedule algorithms.
Keywords :
data flow graphs; processor scheduling; storage management; code memory; dynamic decision; dynamic loop count; loop counts; memory optimal single appearance schedule; minimum data memory; schedule code; schedule quasi-static; synchronous dataflow graph; Application software; Digital signal processing; Dynamic scheduling; Embedded computing; High level languages; Optimal scheduling; Pipelines; Processor scheduling; Scheduling algorithm; Software design;
Conference_Titel :
Design Automation, 2006. Asia and South Pacific Conference on
Print_ISBN :
0-7803-9451-8
DOI :
10.1109/ASPDAC.2006.1594734