DocumentCode :
3262571
Title :
A Phase-Based Self-Tuning Algorithm for Reconfigurable Cache
Author :
Peng, Manman ; Sun, Jiaguang ; Wang, Yuming
Author_Institution :
Sch. of Comput. & Commun., Hunan Univ., Changsha
fYear :
2007
fDate :
2-6 Jan. 2007
Firstpage :
27
Lastpage :
27
Abstract :
The performance of a given cache architecture is largely determined by the behavior of the application using the cache. Reconfigurable cache is an effective low-power technique. Using the technique, microprocessor´s cache can be configured dynamically to adapt itself to the requirement of running program, and minimize the energy consumption and performance loss. We introduce a phase-based self-tuning algorithm (PBSTA), which can automatically, transparently, and dynamically manage the reconfigurable cache on a per-phase basis. In contrast with previous works, the algorithm seeks not only to lower the cache´s energy consumption effectively, but also reduce the performance loss due to unnecessary reconfigurations. By simulating numerous MiBench benchmarks, the results show that the PBSTA, when applied to reconfigurable cache, saves on average 40% of total memory access energy compared with a conventional cache and the associated performance loss is close to 1.8%.
Keywords :
cache storage; microprocessor chips; MiBench benchmarks; energy consumption; phase-based self-tuning algorithm; reconfigurable cache; total memory access energy; Computer architecture; Energy consumption; Hardware; Heuristic algorithms; Performance loss; Software algorithms; Software performance; Space technology; Sun; Tuning; low energy.; program phase; reconfigurable cache; self-tuning algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital Society, 2007. ICDS '07. First International Conference on the
Conference_Location :
Guadeloupe
Electronic_ISBN :
0-7695-2760-4
Type :
conf
DOI :
10.1109/ICDS.2007.2
Filename :
4063788
Link To Document :
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