Automatic fault detection in combinational switching networks

This paper describes an IBM 7090 program for the design of single output combinational switching circuits for arbitrary sets of primitive logical elements. The only restriction on circuit configurations is that no feedback loops may occur. The procedure is an outgrowth of one given by Roth. The decomposition techniques are generalizations of those discussed by Ashenhurst. Given a function F (A, B, C), where A, B, and C are states of binary variables and F may have don´t care combinations, a representation of the form F = G [alpha (A, B), B, C] is called decomposition of F. Any loop-free circuit can be described by a sequence of decompositions. Efficient procedures for the detection of decompositions are given in terms of a convenient normal form representation of switching functions. Simplifications obtained by considering only the subclass of so called vertex-functions are discussed. The program carries out a systematic search through the admissable sequences of decompositions, using a lexicographic ordering, designed so that the most promising sequences are investigated first. Several further refinements are used to limit the search. The calculation yields a list of successively improved implementations, eventually including one of minimum cost. Examples are given of several circuits of minimum or near minimum cost derived by the program.