DocumentCode
3265751
Title
Observability-based RTL simulation using Java
Author
Aly, Sherif G. ; Salem, Ashraf M.
Author_Institution
Gen. Dynamics, Cairo, Egypt
fYear
2004
fDate
19-21 July 2004
Firstpage
179
Lastpage
182
Abstract
In this article, a set of Java classes and description styles are proposed to allow the use of the language to specify and simulate RTL descriptions. Components are made reactive to signals using Java observability. A clock is modeled using the multithreaded features of Java. The proposed classes and styles, named RTLJava, implement a cycle-based simulator by defining a notifying-set method for the signal class and both set and update methods for the registers. The steady state of a signal may take several simulation cycles until no further new notifications of signal value changes are reported. The proposed methodology allows both behavioral and structural descriptions of RTL circuits.
Keywords
Java; circuit simulation; hardware-software codesign; system-on-chip; Java; RTL circuits; RTL simulation; RTLJava; cycle-based simulator; notifying-set method; observability-based simulation; register transfer level; Circuit simulation; Clocks; Computer languages; Concurrent computing; Hardware design languages; Java; Observability; Registers; Specification languages; Virtual machining;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN
0-7695-2182-7
Type
conf
DOI
10.1109/IWSOC.2004.1319874
Filename
1319874
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