Title :
Design of a comparator in CMOS SOI
Author :
Säll, Erik ; Vesterbacka, Mark
Author_Institution :
Dept. of E.E., Linkoping Univ., Sweden
Abstract :
This paper gives an introduction to the silicon-on-insulator (SOI) CMOS technology and presents the major advantages and disadvantages of using SOI. It also presents the design of a comparator, which has been sent for manufacturing, designed in a 0.13 μm partially depleted SOI CMOS process. The comparator is a first step towards the design of a complete 6-bit flash analog-to-digital converter, with a sampling frequency of 1.5 GHz.
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); integrated circuit design; silicon-on-insulator; 0.13 micron; 1.5 GHz; 6 bit; CMOS SOI; analog-to-digital converter; comparator design; silicon-on-insulator; Analog-digital conversion; Body regions; CMOS process; CMOS technology; Impact ionization; MOSFET circuits; Sampling methods; Silicon on insulator technology; Thin film devices; Threshold voltage;
Conference_Titel :
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN :
0-7695-2182-7
DOI :
10.1109/IWSOC.2004.1319884
