A CMOS high-frequency and low-voltage tunable positive transconductor with a improved linearization technique

Author

Del Pozo, J. M García ; Martínez, P.A. ; Otín, A. ; Medrano, N.

Author_Institution

Univ. of Zaragoza, Zaragoza

fYear

2007

fDate

5-8 Aug. 2007

Firstpage

177

Lastpage

180

Abstract

In this paper we present a high frequency and low- voltage positive tunable CMOS transconductor using low cost 0.35 mum CMOS technology. The system works with 2.2 V supply voltage achieving operation frequencies and transconductances higher than 2 GHz and 750 muS. The circuit has been designed with an improved linearization technique based on the parallel of an NMOS transistor in saturation with another NMOS transistor in triode region.

Keywords

CMOS analogue integrated circuits; MOSFET; circuit tuning; linearisation techniques; network synthesis; power supply circuits; CMOS high-frequency transconductor; CMOS technology; NMOS transistor; linearization technique; low-voltage tunable positive transconductor; operation frequency; supply voltage; transconductances; tunable CMOS transconductor; CMOS technology; Frequency; Linearization techniques; MOSFETs; Resistors; Topology; Transconductors; Tunable circuits and devices; Virtual colonoscopy; Voltage; Tunable transconductor; high-frequency; linearization technique; low-voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on

Conference_Location

Montreal, Que.

ISSN

1548-3746

Print_ISBN

978-1-4244-1175-7

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2007.4488566

Filename

4488566