Multiple-valued multiple-rail encoding scheme for low-power asynchronous communication

This paper presents a multiple-valued multiple-rail encoding scheme for low-power asynchronous data transfer between modules inside a VLSI chip. The use of multiple-rail encoding makes it possible to reduce the dynamic range in a single wire. If signal levels per wire are reduced, the asynchronous data transfer between modules can be performed more efficiently with maintained data-transfer capability. Some appropriate combinations of signal levels per wire and wire counts for low-power asynchronous communication are presented. In addition, the power-delay products per value for asynchronous data transfer between modules are evaluated, in some cases, using the proposed encoding scheme.