Hardware and software performance assessment of a multilevel inverter control

Software design is based on sequential integration of components whereas Hardware design is founded on concurrent programming. Throughout an automatic translation process from software structures to hardware structures, many different programming elements are generated, causing a high utilization of logical resources. Design on programmable devices with interpreted programming languages requires in many cases implementation through High Description Languages to improve the performance of a system. Within this scenario, a performance evaluation of a complex algorithm (multilevel inverter control strategy) synthesis into a Field Programming Gate Array (FPGA) on software (synthesis interpreted from MatLab to FPGA) and hardware (direct synthesis of HDL to FPGA) is presented. Performance is validated in terms of resource utilization, power consumption and design flow.