CMOS active transformer current-mode phase-locked loops

This paper introduces active transformer current- mode phase-locked loops. The proposed current-mode PLLs differ from voltage-mode PLLs by replacing their RC loop filter with an active transformer loop filter to take the advantage of the large self and mutual inductances, and small silicon area of active transformers. Implemented in TSMC-0.18 mum CMOS technology, the simulation results of a 3 GHz active transformer current-mode PLL demonstrate that the PLL has the lock time 50 ns, silicon area 2800 mum², dc power consumption 12.2 mW, and phase noise of -81.5 dBc at 1 MHz frequency offset.