A nonlinear capacitance cancellation technique and its application to a CMOS class AB power amplifier

Author

Chengzhou Wang ; Larson, L.E. ; Asbeck, P.M.

Author_Institution

Center for Wireless Commun., California Univ., San Diego, La Jolla, CA, USA

fYear

2001

fDate

20-22 May 2001

Firstpage

39

Lastpage

42

Abstract

A nonlinear cancellation technique is developed specifically for MOS class AB power amplifiers. This technique utilizes a PMOS transistor at the amplifier input to cancel the variation of the input capacitance, thus improving the overall amplifier linearity. A monolithic CMOS RF power amplifier with this technique is designed and fabricated in a standard 0.6 /spl mu/m CMOS technology. The prototype single-stage amplifier has a measured drain efficiency of 40% and a power gain of 7 dB at 1.9 GHz. Linearity measurements show that the new amplifier has over 10 dB of IM/sub 3/ improvement and 6 dB of ACPR improvement compared with the traditional NMOS class AB power amplifier.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; capacitance; compensation; power integrated circuits; 0.6 micron; 1.9 GHz; 40 percent; 7 dB; CMOS power amplifier; amplifier linearity improvement; class AB power amplifier; input PMOS transistor; input capacitance variation; monolithic RF power amplifier; nonlinear capacitance cancellation technique; single-stage amplifier; CMOS technology; Capacitance; Gain measurement; Linearity; MOSFETs; Power amplifiers; Power measurement; Prototypes; Radio frequency; Radiofrequency amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2001. Digest of Papers. 2001 IEEE

Conference_Location

Phoenix, AZ, USA

ISSN

1529-2517

Print_ISBN

0-7803-6601-8

Type

conf

DOI

10.1109/RFIC.2001.935637

Filename

935637