DocumentCode :
3273933
Title :
The Analysis of Phase-Jitter Variance for the Second-Order CPPLL Frequency Synthesizer
Author :
Yao, Chia-Yu ; Yeh, Chin-Chih ; Hsu, Chun-Te
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei
Volume :
4
fYear :
2006
fDate :
25-28 June 2006
Firstpage :
2503
Lastpage :
2506
Abstract :
In this paper, we derive the upper bound of the phase- jitter variance of second-order charge-pump phase-locked loops. We employ the simple linear model in the beginning and integrate the power spectral density functions from different noise sources to determine the closed form of an upper bound of the phase- jitter variance. Four noise sources are considered in this paper. They are the phase noise from the VCO, the noise from the charge pump, the noise from the loop filter, and the noise in the reference signal. Some experiments are performed to verify the proposed theory. The curves of the theoretical upper bounds possess similar shapes with the experimental results.
Keywords :
frequency synthesizers; jitter; phase locked loops; voltage-controlled oscillators; charge-pump phase-locked loops; noise sources; phase-jitter variance; power spectral density functions; second-order CPPLL frequency synthesizer; voltage-controlled oscillators; Analysis of variance; Charge pumps; Density functional theory; Frequency synthesizers; Jitter; Noise shaping; Phase locked loops; Phase noise; Upper bound; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location :
Guilin
Print_ISBN :
0-7803-9584-0
Electronic_ISBN :
0-7803-9585-9
Type :
conf
DOI :
10.1109/ICCCAS.2006.285183
Filename :
4064430
Link To Document :
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