DocumentCode
3274065
Title
Investigation of Reliability Characteristics of Si Nanocrystal NOR Memory Arrays
Author
Jacob, S. ; Perniola, L. ; Festes, G. ; Bodnar, S. ; Coppard, R. ; Thiery, J.F. ; Pedron, T. ; Jalaguier, E. ; Boulanger, F. ; De Salvo, B. ; Deleonibus, S.
Author_Institution
ATMEL Rousset, Rousset
fYear
2007
fDate
26-30 Aug. 2007
Firstpage
71
Lastpage
72
Abstract
In this work, data of a 32Mb Si-NC NOR flash memory product, fabricated in a 130nm ATMEL technology platform have been presented. Measurements have shown an average threshold voltage shift of 3V, without extrinsic bits even after cycling and data retention at 150degC. An in-depth study of gate disturb has been performed, focusing on the influence of the HTO thickness.
Keywords
NOR circuits; flash memories; logic gates; nanoelectronics; silicon; ATMEL technology platform; HTO thickness; Si nanocrystal NOR memory arrays; reliability characteristics; Dielectrics; Electrons; Flash memory; Jacobian matrices; Nanocrystals; Nonvolatile memory; Predictive models; Robustness; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0753-2
Electronic_ISBN
1-4244-0753-2
Type
conf
DOI
10.1109/NVSMW.2007.4290585
Filename
4290585
Link To Document