DocumentCode :
3275142
Title :
Analytical Thermal Analysis of On-chip Interconnects
Author :
Lin, Saihua ; Yang, Huazhong
Author_Institution :
Tsinghua Univ., Beijing
Volume :
4
fYear :
2006
fDate :
25-28 June 2006
Firstpage :
2776
Lastpage :
2780
Abstract :
A detailed analytical analysis of the on-chip thermal related problems of interconnects is provided in this paper. By examining and simplifying the power generation mechanism of on-chip devices, compact expressions of the dynamic temperature profile of an interconnect line are derived. It is shown that the temperature profile of the interconnect line has a space-time distribution and thus we propose some new suggestions to floorplanning when considering this effect. The temperature effects on the Power/Ground (P/G) interconnect lines and the Signal interconnect lines are also analyzed. It is shown that the IR drop and the Elmore delay can be increased due to this temperature effect.
Keywords :
integrated circuit interconnections; thermal analysis; Elmore delay; IR drop; analytical thermal analysis; on-chip interconnects; power generation mechanism; power/ground interconnect lines; signal interconnect lines; CMOS technology; Energy consumption; Heat transfer; Integrated circuit interconnections; Land surface temperature; Power engineering and energy; Power generation; Temperature distribution; Thermal management; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location :
Guilin
Print_ISBN :
0-7803-9584-0
Electronic_ISBN :
0-7803-9585-9
Type :
conf
DOI :
10.1109/ICCCAS.2006.285244
Filename :
4064491
Link To Document :
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