Research on low power design methodology of Register files based on FPGA

Considering the growing power consumption problem of FPGA, which was caused by the greatly increasing of integration density and speed of FPGA. Different from traditional occupying routing resource, lookup table and flip-flop, this method is taken full advantage of FPGA memory resource and employed FPGA Memory block to implement functions of Register files without occupying routing Resource. The experimental simulation results show that the method has the advantages of low cost, saving routing resource, low power, and being easy to implement compared with the traditional ways.